Configurable VLSI-architectures for both standard DCT and shape-adaptive DCT in future MPEG-4 circuit implementations

Shape-adaptive block-based texture coding schemes such as the shape-adaptive DCT (SA-DCT) raise the need for an architecture performing efficiently the transform of variable length N. For an implementation with both standard DCT and SA-DCT required, it is advantageous to have a VLSI architecture which can be configured to compute both schemes. Existing fast algorithms usually consider only the standard DCT of fixed-size length and lack regular structure leading to complex routing. This paper discusses two different architectures satisfying the given requirement in terms of scalability, modularity and regularity. The first proposed architecture represents a time-recursive, fully modular but non-efficient structure regarding the number of operation counts. The second proposed feedforward architecture overcomes problems of numerical instability found in time-recursive structure. Both architectures are modeled in VHDL and synthesized using 0.7 μm two metal-layer CMOS technology for comparison. The design in VHDL is kept generic so that new SA-DCT cores can be easily generated to produce application tailored circuits