Title :
Dynamic power management for embedded systems [SOC design]
Author :
Brock, Bishop ; Rajamani, Karthick
Author_Institution :
IBM Res., Austin, TX, USA
Abstract :
This paper discusses several of the SOC design issues pertaining to dynamic voltage and frequency scalable systems, and how these issues were resolved in the IBM PowerPC 405LP processor. We also introduce DPM, a novel architecture for policy-guided dynamic power management. We illustrate the utility of DPM by its ability to implement several classes of power management strategies and demonstrate practical results for a 405LP embedded system.
Keywords :
computer architecture; embedded systems; integrated circuit design; logic design; low-power electronics; system-on-chip; DPM architecture; PowerPC 405LP processor; SOC design; dynamic frequency scalable systems; dynamic voltage scalable systems; embedded systems; policy-guided dynamic power management; Clocks; Dynamic voltage scaling; Embedded system; Energy management; Frequency; Personal digital assistants; Phase locked loops; Power system management; SDRAM; System-on-a-chip;
Conference_Titel :
SOC Conference, 2003. Proceedings. IEEE International [Systems-on-Chip]
Print_ISBN :
0-7803-8182-3
DOI :
10.1109/SOC.2003.1241556
