DocumentCode
2232667
Title
Analysis on an alternative structure of damping-factor-control frequency compensation
Author
Leung, Ka Nang ; Mok, Philip K T ; Wing-Hung Ki ; Sin, Johnny K O
Author_Institution
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China
Volume
2
fYear
2000
fDate
2000
Firstpage
545
Abstract
This paper introduces an alternative structure to implement damping-factor-control frequency compensation for three-stage amplifiers. A theoretical analysis is presented, and experimental results are included. From the experimental results, the new structure provides better phase margin and power supply rejection ratio but higher power consumption and larger chip area are required
Keywords
CMOS analogue integrated circuits; circuit stability; compensation; differential amplifiers; operational amplifiers; damping-factor-control frequency compensation; multistage amplifiers; phase margin; power consumption; power supply rejection ratio; three-stage amplifiers; Bandwidth; Capacitance; Digital-to-frequency converters; Frequency; Poles and zeros; Read only memory; Silicon compounds; Stability; Transconductance; Transfer functions;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location
Geneva
Print_ISBN
0-7803-5482-6
Type
conf
DOI
10.1109/ISCAS.2000.856386
Filename
856386
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