Title :
Comparative investigations of substrate noise caused by voltage-mode and current-mode gates
Author :
Pawlowski, P. ; Guzinski, A.
Author_Institution :
Dept. of Electron., Tech. Univ. of Koszalin, Poland
Abstract :
This paper presents main results of comparison of signals on the input and output of classical voltage-mode and current-mode digital gates and connects their properties with simultaneously observed waveforms on outputs of analog circuits located on the same silicon substrate. Such investigations have a great value in mixed analog-digital integrated circuit design. Classical inverter has been taken to comparative testing as a representative of voltage mode circuits, and as a current-mode circuit-a NOR gate with static noise margins. The rise time of the digital signal ramp and the distance from digital to analog circuits have been taken into account. The investigations show that peaks of voltage disturbances received at analog nodes are four to six times higher than those transmitted by current-mode gates for the same rise time of the signal ramp, due to stronger current and voltage variations in voltage-mode circuit during switching
Keywords :
CMOS integrated circuits; integrated circuit design; integrated circuit noise; logic gates; mixed analogue-digital integrated circuits; CMOS; NOR gate; current-mode gates; digital gates; digital signal ramp; integrated circuit design; inverter; mixed analog-digital integrated circuits; rise time; simultaneously observed waveforms; static noise margins; substrate noise; voltage disturbances; voltage-mode gates; Analog circuits; Application specific integrated circuits; Circuit testing; Crosstalk; Digital integrated circuits; Frequency; Integrated circuit noise; Inverters; Semiconductor device measurement; Voltage;
Conference_Titel :
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location :
Geneva
Print_ISBN :
0-7803-5482-6
DOI :
10.1109/ISCAS.2000.856390
