Title :
Area efficient time to digital converter (TDC) architecture with double ring-oscillator technique on FPGA for fluorescence measurement application
Author :
Mattad, Mahantesh P. ; Guhilot, Hansraj ; Kamat, Rajanish K.
Author_Institution :
Dept. of Electron. & Commun., K.L.E. Soc.´´s Coll. of Eng. & Technol., Belgaum, India
Abstract :
We present an area efficient Time to Digital Converter (TDC) yielding a high resolution of nearly 10ps. The TDC architecture reported in this paper comprises of coarse measurement using system clock and two controllable oscillators for fine resolution measurement. The reported improved resolution is attributed to the difference in their frequencies. One of the main features of the implementation is its prototyping on a low-cost FPGA.
Keywords :
analogue-digital conversion; field programmable gate arrays; fluorescence; oscillators; time measurement; TDC architecture; area efficient time to digital converter architecture; coarse measurement; double ring-oscillator technique; fine resolution measurement; fluorescence measurement application; low-cost FPGA; system clock; Clocks; Detectors; Field programmable gate arrays; Mathematical model; Radiation detectors; Ring oscillators; Field Programmable Gate Array; Fluorescence; Tapped Delay Line; Time to Digital Converter; Vernier delay Line;
Conference_Titel :
Recent Advances in Intelligent Computational Systems (RAICS), 2011 IEEE
Conference_Location :
Trivandrum, Kerala
Print_ISBN :
978-1-4244-9478-1
DOI :
10.1109/RAICS.2011.6069314
