DocumentCode :
2232944
Title :
Fast and compact dynamic ripple carry adder design
Author :
Fang, Chih-Jen ; Huang, Chung-Hsun ; Wang, Jinn-Shyan ; Yeh, Ching-Wei
Author_Institution :
Inst. of Electr. Eng., Nat. Chung Chen Univ., Chia-Yi, Taiwan
fYear :
2002
fDate :
2002
Firstpage :
25
Lastpage :
28
Abstract :
Adders are fundamental building blocks and often constitute part of the critical path. In this paper, we propose four high-speed ripple carry adder designs using dynamic circuit techniques. CMOS technology based SPICE simulations show that the proposed dynamic ripple carry adders are at least two times faster than the conventional static ripple carry adder. Further, all of the proposed designs compare much favorably to a previous dynamic ripple carry adder design that employs DCVS (differential cascode voltage switch) logic.
Keywords :
CMOS logic circuits; SPICE; adders; carry logic; circuit simulation; integrated circuit design; integrated circuit modelling; logic CAD; logic simulation; CMOS fast/compact dynamic ripple carry adder design; CMOS technology based SPICE simulations; DCVS logic; differential cascode voltage switch logic; dynamic circuit techniques; static ripple carry adders; Adders; Arithmetic; CMOS logic circuits; Circuit simulation; Logic design; Propagation delay; SPICE; Switches; Very large scale integration; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2002. Proceedings. 2002 IEEE Asia-Pacific Conference on
Print_ISBN :
0-7803-7363-4
Type :
conf
DOI :
10.1109/APASIC.2002.1031523
Filename :
1031523
Link To Document :
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