DocumentCode
2233484
Title
Integrated measurement and analysis concept at SMST, a defect management system
Author
Tochtrop, Thomas
Author_Institution
SMST, Boblingen, Germany
fYear
1996
fDate
12-14 Nov 1996
Firstpage
86
Lastpage
91
Abstract
SMST (SubMicron Semiconductor Technologies, a Philips and IBM Joint Venture) has established a system for defect management which combines an integration of measurement and analysis tools with the logistics of measurement lots, means same lots and same wafers defect measured at different process levels and finally combined with electrical test data. Through a token ring network defect data from measurement tools are collected, combined and processed for subsequent review and classification. Defect maps and test data are used to drive microscope and SEM stages to take pictures of the defects. Maps and pictures are available inline or at engineer´s workplace and provide necessary information for fast decision making, i.e. reaction on tool footprint or recognition as “incoming” problem (short feedback loop). The overlay of inline defect maps and functional test data allows traceability and establishment of FM/yield paretos to define action priorities (long feedback loop)
Keywords
integrated circuit manufacture; integrated circuit measurement; FM/yield pareto; SEM; SMST; SubMicron Semiconductor Technologies; classification; defect management; electrical test data; feedback loop; inline defect map; measurement lot; microscopy; review; token ring network; tool footprint recognition; wafer fab; Electric variables measurement; Employment; Feedback loop; International collaboration; Logistics; Scanning electron microscopy; Semiconductor device testing; System testing; Technology management; Token networks;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Semiconductor Manufacturing Conference and Workshop, 1996. ASMC 96 Proceedings. IEEE/SEMI 1996
Conference_Location
Cambridge, MA
ISSN
1078-8743
Print_ISBN
0-7803-3371-3
Type
conf
DOI
10.1109/ASMC.1996.557978
Filename
557978
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