Development of an evaluation model for the design of fault-tolerant solid state mass memory

The use of Commercial Off The Shelf (COTS) devices for space applications is growing due the higher cost and lower performance of corresponding dedicated devices. The needed reliability is achieved at the architectural level. This paper faces this problem in the design of a Solid State Mass Memory (SSMM). High-energy particles induce soft and hard errors in DRAMs devices. In our approach, these errors are mitigated at system level rather than at device level. In particular our SSMM is based on a suitable Error Control Code (ECC) and on memory redundancy in order to improve the tolerance with respect to DRAM induced errors. Accurate space environment models and decisional models are important to optimize the SSMM overhead, the amount of radiation shielding, the overall mass, and could suggest, if possible, the selection of a better orbit with a more benign environment. In this paper we describe the methodology used to select the parameter design for a class of memory architectures