• DocumentCode
    2234547
  • Title

    A Speed-Up Technique for an Auto-Memoization Processor by Collectively Reusing Continuous Iterations

  • Author

    Ikegaya, Tomoki ; Tsumura, Tomoaki ; Matsuo, Hiroshi ; Nakashima, Yasuhiko

  • Author_Institution
    Nagoya Inst. of Technol. Gokiso, Nagoya, Japan
  • fYear
    2010
  • fDate
    17-19 Nov. 2010
  • Firstpage
    63
  • Lastpage
    70
  • Abstract
    We have proposed an auto-memoization processor based on computation reuse, and merged it with speculative multithreading based on value prediction into a parallel early computation. In the past model, the parallel early computation detects each iteration of loops as a reusable block. This paper proposes a new parallel early computation model, which integrates multiple continuous iterations into a reusable block automatically and dynamically without modifing executable binaries. We also propose a model for automatically detecting how many iterations should be integrated into one reusable block. Our model reduces the overhead of computation reuse, and further exploits reuse tables. The result of the experiment with SPEC CPU95 FP suite benchmarks shows that the new model improves the maximum speedup from 40.5% to 57.6%, and the average speedup from 15.0% to 26.0%.
  • Keywords
    iterative methods; microprocessor chips; multi-threading; storage management chips; SPEC CPU95 FP suite; auto memoization processor; continuous iteration; executable binary; loop iteration; multithreading; parallel computation; reusable block; speed up technique; value prediction;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Networking and Computing (ICNC), 2010 First International Conference on
  • Conference_Location
    Higashi-Hiroshima
  • Print_ISBN
    978-1-4244-8918-3
  • Electronic_ISBN
    978-0-7695-4277-5
  • Type

    conf

  • DOI
    10.1109/IC-NC.2010.46
  • Filename
    5695215