A 0.18-μm CMOS offset-PLL upconversion modulation loop IC for DCS-1800 transmitter

Author

Hsu, June-Ming

Author_Institution

SoC Technol. Center, Ind. Technol. Res. Inst., Hsinchu, Taiwan

fYear

2002

fDate

2002

Firstpage

307

Lastpage

310

Abstract

A DCS-1800 offset-PLL upconversion modulation loop IC, which is fabricated in a 0.18-μm CMOS technology, is presented in this paper. This IC operates at 2.8 V supply voltage with a current consumption of 36 mA. The measured r.m.s. and peak phase errors of the GMSK transmission signal are 1.6 and 4 degree, respectively. It is shown that such circuit can be implemented in a CMOS process with current dissipation and performance comparable to BiCMOS commercial products. The advantages of an upconversion modulation loop and the design issues of IQ modulators are also described in this paper.

Keywords

CMOS integrated circuits; UHF integrated circuits; cellular radio; minimum shift keying; modulators; phase locked loops; radio transmitters; 0.18 micron; 1785 MHz; 2.8 V; 36 mA; CMOS upconversion modulation loop IC; DCS-1800 transmitter; GMSK transmission signal; IQ modulators; deep submicron CMOS technology; offset-PLL upconversion modulation loop; transmitter architecture; BiCMOS integrated circuits; CMOS integrated circuits; CMOS process; CMOS technology; Phase frequency detector; Phase modulation; Radio frequency; Transceivers; Transmitters; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2002. Proceedings. 2002 IEEE Asia-Pacific Conference on

Print_ISBN

0-7803-7363-4

Type

conf

DOI

10.1109/APASIC.2002.1031593

Filename

1031593