DocumentCode :
2234753
Title :
A programmable data background generator for march based memory testing
Author :
Wang, Wei-Lun ; Lee, Kuen-Jong
Author_Institution :
Dept. of Electron. Eng., Cheng Shiu Inst. of Technol., Kaohsiung, Taiwan
fYear :
2002
fDate :
2002
Firstpage :
347
Lastpage :
350
Abstract :
Due to the short test time and high fault coverage, march algorithms have been widely used to test the SRAM and DRAM memory chips and cores in a system-on-chip (SOC). To raise the fault coverage of the word-oriented memories (WOMs), distinct data backgrounds of the march algorithms are required. In this paper we have integrated two kinds of data background generators into a single design in the built-in self-test (BIST) environment. The proposed data background generator can generate different sizes and different kinds of data backgrounds for testing the WOMs. It is shown that the design is easily programmable with very little external control. Also when combined with the existing data register in the memory, the hardware overhead is quite small.
Keywords :
built-in self test; fault diagnosis; integrated circuit testing; integrated memory circuits; logic testing; system-on-chip; BIST; DRAM; SRAM; WOMs; fault coverage; hardware overhead; march based memory testing; programmable data background generator; system-on-chip; test time; word-oriented memories; Built-in self-test; Circuit faults; Circuit testing; Combinational circuits; Costs; Hardware; Random access memory; System testing; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2002. Proceedings. 2002 IEEE Asia-Pacific Conference on
Print_ISBN :
0-7803-7363-4
Type :
conf
DOI :
10.1109/APASIC.2002.1031603
Filename :
1031603
Link To Document :
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