• DocumentCode
    2236058
  • Title

    Profile-assisted Compiler Support for Dynamic Predication in Diverge-Merge Processors

  • Author

    Kim, Hyesoon ; Joao, José A. ; Mutlu, Onur ; Patt, Yale N.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX
  • fYear
    2007
  • fDate
    11-14 March 2007
  • Firstpage
    367
  • Lastpage
    378
  • Abstract
    Dynamic predication has been proposed to reduce the branch misprediction penalty due to hard-to-predict branch instructions. A proposed dynamic predication architecture, the diverge-merge processor (DMP), provides large performance improvements by dynamically predicating a large set of complex control-flow graphs that result in branch mispredictions. DMP requires significant support from a profiling compiler to determine which branch instructions and control-flow structures can be dynamically predicated. However, previous work on dynamic predication did not extensively examine the tradeoffs involved in profiling and code generation for dynamic predication architectures. This paper describes compiler support for obtaining high performance in the diverge-merge processor. We describe new profile-driven algorithms and heuristics to select branch instructions that are suitable and profitable for dynamic predication. We also develop a new profile-based analytical cost-benefit model to estimate, at compile-time, the performance benefits of the dynamic predication of different types of control-flow structures including complex hammocks and loops. Our evaluations show that DMP can provide 20.4% average performance improvement over a conventional processor on SPEC integer benchmarks with our optimized compiler algorithms, whereas the average performance improvement of the best-performing alternative simple compiler algorithm is 4.5%. We also find that, with the proposed algorithms, DMP performance is not significantly affected by the differences in profile- and run-time input data sets
  • Keywords
    flow graphs; program compilers; program control structures; control-flow graphs; diverge-merge processors; dynamic predication; hard-to-predict branch instructions; profile-assisted compiler; profile-driven algorithms; profiling compiler; Algorithm design and analysis; Analytical models; Computer architecture; Convergence; Cost benefit analysis; Dynamic compiler; Heuristic algorithms; Instruction sets; Runtime; Shape control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Code Generation and Optimization, 2007. CGO '07. International Symposium on
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    0-7695-2764-7
  • Type

    conf

  • DOI
    10.1109/CGO.2007.31
  • Filename
    4145128