DocumentCode
2236596
Title
Digital lock detector for PLL
Author
Melikyan, Vazgen ; Hovsepyan, Aram ; Ishkhanyan, Mkrtich ; Hakobyan, Tigran
Author_Institution
Synopsys Armenia CJSC, Armenia
fYear
2008
fDate
9-12 Oct. 2008
Firstpage
141
Lastpage
142
Abstract
The purpose of this work is to add one more circuit into the traditional PLL to define the lock condition. Fully digital lock detector is presented. Presented circuit provides a simple design, process independence and design automation.
Keywords
digital phase locked loops; network synthesis; PLL; design automation; digital lock detector; lock condition; process independence; Conferences; Detectors; Phase frequency detector; Phase locked loops; Radiation detectors; Receivers; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Test Symposium (EWDTS), 2008 East-West
Conference_Location
Lviv
Print_ISBN
978-1-4244-3402-2
Electronic_ISBN
978-1-4244-3403-9
Type
conf
DOI
10.1109/EWDTS.2008.5580147
Filename
5580147
Link To Document