DocumentCode
2236616
Title
A Novel Hardware Implementation of the Compact Genetic Algorithm
Author
Moreno-Armendáriz, Marco A. ; Cruz-Cortés, Nareli ; León-Javier, Alejandro
Author_Institution
Centro de Investig. en Comput., Inst. Politec. Nac., Mexico City, Mexico
fYear
2010
fDate
13-15 Dec. 2010
Firstpage
156
Lastpage
161
Abstract
In this paper we show a novel and efficient design of a compact Genetic Algorithm (cGA) in Hardware. This design presents the following features: modularity, concurrency, minimal resource consumption, real time execution, and high scalability properties. According to the obtained results, we show that it is viable to have this search algorithm in Hardware to be used in real time applications.
Keywords
genetic algorithms; hardware-software codesign; compact genetic algorithm; concurrency; hardware implementation; minimal resource consumption; modularity; real time execution; search algorithm; Compact Genetic Algorithm; FPGA design;
fLanguage
English
Publisher
ieee
Conference_Titel
Reconfigurable Computing and FPGAs (ReConFig), 2010 International Conference on
Conference_Location
Quintana Roo
Print_ISBN
978-1-4244-9523-8
Electronic_ISBN
978-0-7695-4314-7
Type
conf
DOI
10.1109/ReConFig.2010.54
Filename
5695298
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