On FPGA-Based Implementations of the SHA-3 Candidate Grøstl

The National Institute of Standards and Technology (NIST) has started a competition for a new secure hash standard. A significant comparison between the submitted candidates is only possible, if third party implementations of all proposed hash functions are provided. Our work is for the most part motivated by future developments of mass markets, where cryptographic infrastructures will become more and more important. One core component of such an infrastructure is a secure cryptographic hash function, which is used for a lot of applications like challenge-response authentication systems or digital signature schemes. We chose to evaluate the Grøstl hash function as one of the candidates heavily influenced by the AES algorithm, because there is reasonable hope to reduce the area of the cryptographic infrastructure by integrating AES and one of these hash algorithms on a FPGA. Hence, Grøstl serves as an example for the hash functions related to the AES approach. Our focus on low budget cryptographic solutions makes it natural to investigate possible optimizations for area efficient implementations, alongside our high-throughput variant. Our results show, that - while Grøstl is inherently quite large compared to AES - it is possible to implement the Grøstl algorithm on small and low budget FPGAs like the second smallest available Spartan-3, while maintaining a reasonably high throughput.