DocumentCode
2237328
Title
Systemc refinement of abstract adaptive processes for implementation into Dynamically Reconfigurable Hardware
Author
Herrera, F. ; Villar, E. ; Hartmann, P.A.
Author_Institution
TEISA Dept., Univ. of Cantabria (Spain), Santander, Spain
fYear
2011
fDate
13-15 Sept. 2011
Firstpage
1
Lastpage
8
Abstract
Adaptivity is a key feature in current embedded systems which requires a explicit support in Electronic System-Level (ESL) design methodologies. It means support for abstract specification of the adaptive parts of a system, and suitable implementation flows. In this sense, Dynamically Recon-figurable Hardware (DRHW) enables a cost efficient implementation of adaptive functionality in contexts where a software implementation does not fulfil time performance demands. This paper presents a SystemC-based refinement flow to convert the abstract specification of the adaptive parts of a system, into a functionally equivalent refined description which can be automatically synthesised as DRHW. The flow is based on two existing SystemC-based specification methodologies, and supports multi-level simulation through a seamless connection of the refined adaptive parts to the rest of the specification. The refinement of an adaptive inverse transform module, as part of an adaptive video decoder (AVD), is used as a demonstrative example.
Keywords
C language; electronic engineering computing; embedded systems; reconfigurable architectures; video coding; SystemC refinement; abstract adaptive processes; abstract specification; adaptive video decoder; dynamically reconfigurable hardware; electronic system level design methodologies; embedded systems; multilevel simulation; Adaptation models; Adaptive systems; Context; Hardware; Semantics; Software; Synchronization;
fLanguage
English
Publisher
ieee
Conference_Titel
Specification and Design Languages (FDL), 2011 Forum on
Conference_Location
Oldenburg
ISSN
1636-9874
Print_ISBN
978-1-4577-0763-6
Electronic_ISBN
1636-9874
Type
conf
Filename
6069485
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