• DocumentCode
    2237611
  • Title

    Singular Value Decomposition Hardware for MIMO: State of the Art and Custom Design

  • Author

    Wang, Yue ; Cunningham, Kevin ; Nagvajara, Prawat ; Johnson, Jeremy

  • Author_Institution
    Electr. & Comput. Eng., Drexel Univ., Philadelphia, PA, USA
  • fYear
    2010
  • fDate
    13-15 Dec. 2010
  • Firstpage
    400
  • Lastpage
    405
  • Abstract
    This paper presents a custom hardware design for computing Singular Value Decomposition (SVD) of the radio communication channel characteristic matrix. The custom hard-ware was implemented to reduce the SVD computing time. The pipeline hardware developed is suitable for computing the SVD of a sequence of 2 × 2 complex-value matrices used in MIMO-OFDM standards, such as the IEEE 802.11n. The hardware developed achieves an optimum pipeline rate which equaled the maximum hardware clock rate. The proposed architecture provides performance gains over standard software libraries, such as the ZGESVD function of Linear Algebra Package (LAPACK) library, when running on standard processors.
  • Keywords
    MIMO communication; OFDM modulation; radiocommunication; singular value decomposition; telecommunication standards; wireless LAN; IEEE 802.11n; MIMO-OFDM standards; ZGESVD function; clock rate; complex-value matrices; custom hardware design; linear algebra package library; pipeline hardware; radio communication channel; singular value decomposition hardware; standard software libraries; FPGA; MIMO; OFDM; Pipeline; SDR; Singular Value Decomposition;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reconfigurable Computing and FPGAs (ReConFig), 2010 International Conference on
  • Conference_Location
    Quintana Roo
  • Print_ISBN
    978-1-4244-9523-8
  • Electronic_ISBN
    978-0-7695-4314-7
  • Type

    conf

  • DOI
    10.1109/ReConFig.2010.62
  • Filename
    5695339