DocumentCode
2237742
Title
Configuration Sharing Optimized Placment and Routing
Author
Stepien, Piotr ; Cobb, John
Author_Institution
Sch. of DEC, Bournemouth Univ., Poole, UK
fYear
2010
fDate
13-15 Dec. 2010
Firstpage
430
Lastpage
435
Abstract
Reconfigurable systems have been shown to achieve very high performance. However, the overhead associated with reconfiguration of hardware remains a critical factor in overall system performance. This paper discusses the development and evaluation of a technique to minimize the delay associated with reconfiguration based upon optimized sharing of configuration bit streams between design contexts. This is achieved through modified placement and routing algorithms.
Keywords
field programmable gate arrays; network routing; optimisation; reconfigurable architectures; FPGA; configuration bit streams; reconfigurable systems; routing; sharing optimized placement; FPGA; placement; reconfiguration; routing;
fLanguage
English
Publisher
ieee
Conference_Titel
Reconfigurable Computing and FPGAs (ReConFig), 2010 International Conference on
Conference_Location
Quintana Roo
Print_ISBN
978-1-4244-9523-8
Electronic_ISBN
978-0-7695-4314-7
Type
conf
DOI
10.1109/ReConFig.2010.58
Filename
5695344
Link To Document