Title :
A low-power VLSI architecture for face verification using elastic graph matching
Author :
Nagel, Jean-Luc ; Stadelmann, Patrick ; Ansorge, Michael ; Pellandini, Fausto
Author_Institution :
Electron. & Signal Process. Lab., Univ. of Neuchatel, Neuchatel, Switzerland
Abstract :
This paper introduces a novel low-power VLSI architecture dedicated to algorithms based on elastic graph matching. The targeted application is face verification for low-power mobile devices (e.g. mobile phones, personal digital assistants, wearable computing devices). A description of the overall verification system is provided jointly to a detailed discussion of the full-custom graph matching coprocessor.
Keywords :
VLSI; coprocessors; face recognition; graph theory; image matching; low-power electronics; mobile computing; elastic graph matching; face verification; full custom graph matching coprocessor; low-power VLSI architecture; low-power mobile device; Abstracts; Face; Image segmentation; Principal component analysis;
Conference_Titel :
Signal Processing Conference, 2002 11th European
Conference_Location :
Toulouse
