DocumentCode
2238196
Title
A systolic architecture for labeling the connected components of multi-valued images in real time
Author
Nicol, C.J.
Author_Institution
Sch. of Comput. Sci. & Eng., New South Wales Univ., Kensington, NSW, Australia
fYear
1993
fDate
15-17 Jun 1993
Firstpage
136
Lastpage
141
Abstract
A system capable of labeling the connected components of multi-valued images at video rates is described. The technique uses a simple linear systolic array to modify the labels of recently visited pixels in a raster scan. The array removes the need for the complex processing of label equivalence tables used in previous algorithms. A two-pass system is designed using the same custom VLSI chip for both passes with minimal support circuitry. This has an advantage over previous hardware implementations where more complex algorithms require separate hardware modules for each pass
Keywords
VLSI; image processing; real-time systems; systolic arrays; connected components; custom VLSI chip; labeling; linear systolic array; minimal support circuitry; multi-valued images; raster scan; real time; systolic architecture; two-pass system; video rates; Algorithm design and analysis; Australia; Circuits; Clustering algorithms; Computer architecture; Computer science; Hardware; Labeling; Systolic arrays; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Vision and Pattern Recognition, 1993. Proceedings CVPR '93., 1993 IEEE Computer Society Conference on
Conference_Location
New York, NY
ISSN
1063-6919
Print_ISBN
0-8186-3880-X
Type
conf
DOI
10.1109/CVPR.1993.340998
Filename
340998
Link To Document