DocumentCode
2238777
Title
Evaluation of 600 V/100 A NPT-IGBT with a non-self-align shallow p-well formation techniques
Author
Otsuki, M. ; Momota, S. ; Kirisawa, M. ; Wakimoto, H. ; Seki, Y.
Author_Institution
Semicond. Device R&D Center, Fuji Electr. Co. Ltd., Nagano, Japan
fYear
2000
fDate
2000
Firstpage
225
Lastpage
228
Abstract
Experimental results of planer gate IGBTs fabricated with newly developed a non-self-align shallow p-well formation technique are presented. The 600 V/100 A NPT-IGBT shows the on-state voltage drop of about 1.7 V, which is more than 0.4 V reduction compared to the conventional devices. The average short circuit withstand capability of about 30 μsec was obtained without external current limiting functions
Keywords
insulated gate bipolar transistors; 100 A; 600 V; NPT-IGBT; nonself-align shallow p-well formation; on-state voltage drop; planar gate IGBT; short circuit withstand capability; Circuits; Costs; Current limiters; Insulated gate bipolar transistors; Metalworking machines; Production facilities; Research and development; Semiconductor devices; Semiconductor optical amplifiers; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Semiconductor Devices and ICs, 2000. Proceedings. The 12th International Symposium on
Conference_Location
Toulouse
ISSN
1063-6854
Print_ISBN
0-7803-6269-1
Type
conf
DOI
10.1109/ISPSD.2000.856812
Filename
856812
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