An 8 GHz Variable Gain Low Noise Amplifier (VGLNA) Utilizing Parallel Inter-Stage Resonance

Author

Lee, Lini ; Jamuar, S.S. ; Sidek, R.M. ; Khatun, S.

Author_Institution

Dept. of Electr. & Electron. Eng., Univ. Putra Malaysia, Serdang

fYear

2006

fDate

4-7 Dec. 2006

Firstpage

45

Lastpage

48

Abstract

A two-stage variable gain low noise amplifier (VGLNA) topology is proposed, which adopts a parallel interstage resonance. The characteristics of the parallel inter-stage resonance in gain enhancement are analyzed and this is then followed by the application of a simple circuit consisted of two transistors as the variable gain stage. The VGLNA is designed and simulated based on a 0.18 mum CMOS technology for 8-GHz X-band applications. Simulation results show 13.63 dB of power gain, 3.60 dB of noise figure, 4.27 dBm of IIP3 and dc power supply of 1 V with 35.67 mA current drawn

Keywords

CMOS integrated circuits; MMIC amplifiers; low noise amplifiers; 1 V; 13.63 dB; 3.60 dB; 35.67 mA; 8 GHz; CMOS technology; MMIC amplifiers; X-band amplifier; gain enhancement; parallel inter-stage resonance; variable gain low noise amplifier; CMOS technology; Circuit noise; Circuit simulation; Circuit topology; Gain; Low-noise amplifiers; Noise figure; Power supplies; RLC circuits; Resonance; gain enhancement; parallel inter-stage resonance; variable gain low noise amplifier;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on

Conference_Location

Singapore

Print_ISBN

1-4244-0387-1

Type

conf

DOI

10.1109/APCCAS.2006.342292

Filename

4145328