Design and modeling of H-ternary line encoder for digital data transmission

The design procedure together with two models of an H-ternary line encoder is given. The encoding procedure is described for how a binary sequence is encoded to H-ternary line code. The design approach of the encoder circuit uses a combinational logic circuit. The encoder circuit is then modelled using simulation and prototype techniques. The simulation model is realized using the Circuitmaker package which is also used to achieve circuit operability prior to hardware implementation. Also, a prototype model of the encoder has been built for the purpose of operational verification with the simulation model. Both models are in a quite good agreement with each other regarding the encoded waveform results that are obtained and with those of the encoding principle