Title :
The automatic generation of functional test vectors for Rambus designs
Author :
Jones, K.D. ; Privitera, J.P.
Author_Institution :
Rambus Inc., Mountain View, CA, USA
Abstract :
We present a method for the automatic generation of test vectors for functional verification, giving the advantages of random and directed testing. We show the use of a formal specification as input to a test generator. We present techniques for the efficient implementation of the generator. We discuss our experience with this method applied to commercial designs. We show how our approach is a stepping stone towards practical formal verification
Keywords :
formal specification; formal verification; logic CAD; logic testing; Rambus designs; formal specification; formal verification; functional test vectors; functional verification; test generator; test vectors; Automatic testing; Formal specifications; Formal verification; Hardware design languages; Microprocessors; Permission; Protocols; Random access memory; Registers; System testing;
Conference_Titel :
Design Automation Conference Proceedings 1996, 33rd
Conference_Location :
Las Vegas, NV
Print_ISBN :
0-7803-3294-6
DOI :
10.1109/DAC.1996.545612
