Title :
Low Power Current-Mode Algorithmic ADC in Half Flash (BCD)
Author :
Chuenarom, S. ; Maitreechit, S. ; Roengruen, P. ; Tipsuwarnpron, V.
Author_Institution :
Dept. of Electron. Eng., South East Asia Univ., Bangkok
Abstract :
This paper presents a principle of analog to digital converter (ADC) based on current mode half flash (BCD). This circuit can be converted to 4-bit output at each moment, and multiple output bit numbers by serial connection. It uses a current injection technique to increase the speed of current mirrors, low power and algorithmic ADC application is presented. A current mode, the active current mirror and current comparators that controlled reference current by W/L ratio, has been used. Its feasibility agrees with simulation results of PSPICE program. The circuit design used CMOS 0.5mum which is capable to the slowest conversion time is less than 5.2nS, resulting in a conversion rate of more than 195 MHz, power consumed 1mW , input current 0-60 muA and single 2.5V supply
Keywords :
CMOS integrated circuits; analogue-digital conversion; current comparators; current mirrors; current-mode circuits; low-power electronics; 0 to 60 muA; 0.5 micron; 1 mW; 2.5 V; 4 bit; CMOS integrated circuits; PSPICE program; active current mirror; current comparators; current injection; current mode half flash; current-mode algorithmic analog-to-digital converter; low power analog-to-digital converter; reference current; Analog-digital conversion; Asia; CMOS analog integrated circuits; CMOS digital integrated circuits; CMOS technology; Circuit simulation; Circuit synthesis; Mirrors; Power engineering and energy; SPICE; ADC; Active current mirror; CMOS; Power consumed;
Conference_Titel :
Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
Conference_Location :
Singapore
Print_ISBN :
1-4244-0387-1
DOI :
10.1109/APCCAS.2006.342341
