Title :
A Switched-Voltage High-Accuracy Sample/Hold Circuit
Author :
Ohno, Kenji ; Matsumoto, Hirokazu ; Murao, Kenji
Author_Institution :
Graduate Sch. of Eng.,, Miyazaki Univ.
Abstract :
In this paper, a switched-voltage (SV) sample/hold (S/H) circuit is presented for low voltage operation. The circuit consists of a CMOS SV-S/H circuit. Thus, the configuration is very simple. The proposed circuit can operate using simple nonoverlapping two phase clocks. Performance is verified by simulations on PSpice
Keywords :
CMOS analogue integrated circuits; low-power electronics; sample and hold circuits; CMOS SV-S/H circuit; PSpice; low voltage operation; nonoverlapping two phase clocks; switched-voltage sample/hold circuit; Switching circuits;
Conference_Titel :
Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
Conference_Location :
Singapore
Print_ISBN :
1-4244-0387-1
DOI :
10.1109/APCCAS.2006.342342
