DocumentCode :
2240699
Title :
VLSI design and implementation of 2-D Inverse Discrete Wavelet Transform
Author :
McCanny, Paul ; McCanny, John ; Masud, Shahid
Author_Institution :
DSiP Labs., Queens Univ. of Belfast, Belfast, UK
fYear :
2002
fDate :
3-6 Sept. 2002
Firstpage :
1
Lastpage :
4
Abstract :
This paper proposes a JPEG-2000 compliant architecture capable of computing the 2 -D Inverse Discrete Wavelet Transform. The proposed architecture uses a single processor and a row-based schedule to minimize control and routing complexity and to ensure that processor utilization is kept at 100%. The design incorporates the handling of borders through the use of symmetric extension. The architecture has been implemented on the Xilinx Virtex2 FPGA.
Keywords :
VLSI; discrete wavelet transforms; integrated circuit design; inverse transforms; 2D inverse discrete wavelet transform; JPEG-2000 compliant architecture; VLSI design; Xilinx Virtex2 FPGA; routing complexity; row-based schedule; single processor; Abstracts; Computer architecture; Discrete wavelet transforms; Schedules;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Conference, 2002 11th European
Conference_Location :
Toulouse
ISSN :
2219-5491
Type :
conf
Filename :
7072288
Link To Document :
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