DocumentCode
2241451
Title
An Electrical Model for the Fault Simulation of Small Delay Faults Caused by Crosstalk Aggravated Resistive Short Defects
Author
Houarche, N. ; Comte, M. ; Renovell, M. ; Czutro, A. ; Engelke, P. ; Polian, I. ; Becker, B.
Author_Institution
LIRMM, UMII, Montpellier, France
fYear
2009
fDate
3-7 May 2009
Firstpage
21
Lastpage
26
Abstract
In this paper a new electrical model is proposed to be used in fault size based fault simulation of crosstalk aggravated resistive short defects. The electrical behavior of the defect is first described and analyzed in details. Then an electrical model is proposed allowing to efficiently compute the critical resistance determining the range of detectable short resistance. The model is validated by comparison with SPICE simulations.
Keywords
crosstalk; electric resistance; electrical faults; fault simulation; SPICE simulation; aggravated resistive short defect; crosstalk; delay faults; detectable short resistance; electrical behavior; electrical model; fault simulation; fault size; Crosstalk; Delay; Defect model; Test; VLSI; fault simultion;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 2009. VTS '09. 27th IEEE
Conference_Location
Santa Cruz, CA
ISSN
1093-0167
Print_ISBN
978-0-7695-3598-2
Type
conf
DOI
10.1109/VTS.2009.57
Filename
5116604
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