DocumentCode :
2241547
Title :
Exploiting Unused Spare Columns to Improve Memory ECC
Author :
Datta, Rudrajit ; Touba, Nur A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Texas, Austin, TX, USA
fYear :
2009
fDate :
3-7 May 2009
Firstpage :
47
Lastpage :
52
Abstract :
Spare columns are often included in memories for the purpose of allowing for repair in the presence of defective cells or bit lines. In many cases, the repair process will not use all spare columns. This paper proposes an extremely low cost method to exploit these unused spare columns to improve the reliability of the memory by enhancing its existing error correcting code (ECC). Memories are generally protected with single-error-correcting, double-error-detecting (SEC-DED) codes using the minimum number of check bits. In the proposed method, unused spare columns are exploited to store additional check bits which can be used to reduce the miscorrection probability for triple errors in SEC-DED codes or non-adjacent double errors in single adjacent error correcting codes (SEC-DAEC) codes.
Keywords :
circuit reliability; error correction codes; memory architecture; double-error-detecting codes; memory ECC; reliability; single-error-correcting codes; unused spare columns; Costs; Error correction codes; Fault tolerance; Parity check codes; Protection; Single event transient; Single event upset; Tail; Testing; Very large scale integration; Miscorrection; SEC-DAEC; SEC-DED; Spare columns;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 2009. VTS '09. 27th IEEE
Conference_Location :
Santa Cruz, CA
ISSN :
1093-0167
Print_ISBN :
978-0-7695-3598-2
Type :
conf
DOI :
10.1109/VTS.2009.52
Filename :
5116608
Link To Document :
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