DocumentCode
2241960
Title
Adaptive and Speculative Slack Simulations of CMPs on CMPs
Author
Chen, Jianwei ; Dabbiru, Lashkmi Kumar ; Wong, Daniel ; Annavaram, Murali ; Dubois, Michel
Author_Institution
Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
fYear
2010
fDate
4-8 Dec. 2010
Firstpage
523
Lastpage
534
Abstract
Current trends signal an imminent crisis in the simulation of future CMPs (Chip Multiprocessors). Future micro-architectures will offer more and more thread contexts to execute parallel programs, but the execution speed of each thread will not improve at the same pace. CMPs with 10´s or even 100´s of cores are envisioned. Simulating these future CMP sefficiently without compromising accuracy is a challenge. Slack simulation is a general parallel simulation paradigm which provides flexible trade-offs between simulation accuracy and speed. Simulation threads do not synchronize after every target core cycle as in cycle-by-cycle simulation. Rather a maximum slack (the slack bound) is enforced between the clocks of all simulated cores. A slack simulation may become inaccurate because of simulation violations. Such violations occur when a resource is accessed by two cores in different order in the simulation and in the target system. We introduce and demonstrate techniques to detect violations, to adapt the simulation slack to maintain a target violation rate, and to checkpoint and rollback a slack simulation when violations are detected. We show some simulation performance/accuracy data for a set of five Splash benchmarks in the context of an 8-core CMP with a snooping cache coherence protocol simulated on Slack Sim, our universal slack simulation platform.
Keywords
microprocessor chips; multi-threading; multiprocessing systems; parallel architectures; 8-core CMP; SlackSim; Splash benchmark; adaptive slack simulation; chip multiprocessor; cycle-by-cycle simulation; microarchitecture; multithreading; parallel program; parallel simulation; speculative slack simulation; Measuring; Modeling; simulation and parallel simulation;
fLanguage
English
Publisher
ieee
Conference_Titel
Microarchitecture (MICRO), 2010 43rd Annual IEEE/ACM International Symposium on
Conference_Location
Atlanta, GA
ISSN
1072-4451
Print_ISBN
978-1-4244-9071-4
Type
conf
DOI
10.1109/MICRO.2010.47
Filename
5695563
Link To Document