A Wide Input-Range ΣΔ Modulator for Applications to Spread-Spectrum Clock Generator

Author

Kao, Yao-Huang ; Hsieh, Yi-Bin

Author_Institution

Inst. of Commun. Eng., Nat. Chiao-Tung Univ., Hsin-Chu

fYear

2006

fDate

4-7 Dec. 2006

Firstpage

530

Lastpage

533

Abstract

A spread-spectrum clock generator (SSCG) using fractional-N phase-locked loop (PLL) with an extended range sigma-delta (ΣΔ) modulator is presented in this paper. The proposed ΣΔ modulator simply adds an extra output bit in the first stage modulator. It can enlarge the input range about three times as compared to the conventional modulator and solve the saturation problem when the input exceeds the boundary of the conventional modulator. The proposed SSCG has been fabricated in TSMC 0.35-mum double-poly quadruple-metal CMOS process with output frequency of 300MHz. The active area is 0.63×0.62 mm₂ and the power consumption is 17.5mW

Keywords

clocks; phase locked loops; pulse generators; sigma-delta modulation; 0.35 micron; 17.5 mW; 300 MHz; CMOS process; PLL; SSCG; TSMC; double poly quadruple metal; phase locked loop; sigma delta modulator; spread spectrum clock generator; Circuits; Clocks; Delta-sigma modulation; Digital control; Digital modulation; IEEE members; Phase frequency detector; Phase locked loops; Spread spectrum communication; Voltage-controlled oscillators; PLL; sigma-delta modulator; spread spectrum;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on

Conference_Location

Singapore

Print_ISBN

1-4244-0387-1

Type

conf

DOI

10.1109/APCCAS.2006.342525

Filename

4145448