A novel design using translinear circuit for linear LINC transmitters

The LINC transmitter is an architecture that provides linear amplification using nonlinear but power efficient amplifiers. One crucial signal processing function of LINC is the signal component separator (SCS) which forms two constant-amplitude phase-modulated signal components (phasors) from the input signal. Any amplitude ripple in the two phasors due to imperfect generation will degrade the system linearity after going through nonlinear amplification. Although DSP implementation of SCS at baseband has so far been assumed to be the best choice, it suffers from matching, bandwidth and power consumption problems. In this paper, a novel analog SCS design using translinear circuit is presented to avoid the problems faced by a DSP-based realization. Using this design, a SCS circuit operating at an IF of 200 MHz was implementated in a 0.8 μm BiCMOS process. Simulation results show that for an input signal with 10:1 amplitude variation, the ripple in the two phasors produced by this SCS is below 2%, which will ensure a high linearity LINC transmitter if the two amplifier branches followed are well matched. Also, wideband operation is possible with this design since there is no bandwidth limitation imposed by a feedback loop as found in other analog SCS designs