DocumentCode
2243310
Title
Analysis of operation delay and execution rate constraints for embedded systems
Author
Gupta, Rajesh K.
Author_Institution
Dept. of Comput. Sci., Illinois Univ., Urbana, IL, USA
fYear
1996
fDate
3-7 Jun, 1996
Firstpage
601
Lastpage
604
Abstract
Constraints on the delay and execution rate of operations in an embedded application are needed to ensure its timely interaction with a reactive enviroment. We present a static analysis of the timing constraints satisfiability by a given system design consisting of interacting hardware and software components. We use this analysis to evaluate the effect of individual timing constraints on system design issues, such as the choice of the software runtime system, bounds on loop, invocations, and the hardware-software synchronization operations. We show, by example, the use of static analysis techniques in the design of embedded systems
Keywords
program diagnostics; real-time systems; synchronisation; system monitoring; systems analysis; embedded systems design; execution rate constraints; hardware-software synchronization operations; individual timing constraints; operation delay; reactive enviroment; software runtime system; static analysis; static analysis techniques; system design; system design issues; timely interaction; timing constraints satisfiability; Computer science; Delay; Embedded system; Flow graphs; Hardware design languages; Logic; Performance analysis; Permission; System analysis and design; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference Proceedings 1996, 33rd
Conference_Location
Las Vegas, NV
ISSN
0738-100X
Print_ISBN
0-7803-3294-6
Type
conf
DOI
10.1109/DAC.1996.545646
Filename
545646
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