• DocumentCode
    2243544
  • Title

    A CABAC Encoding Core with Dynamic Pipeline for H.264/AVC Main Profile

  • Author

    Li, Lingfeng ; Song, Yang ; Ikenaga, Takeshi ; Goto, Satoshi

  • Author_Institution
    Graduate Sch. of Inf., Production & Syst., Waseda Univ., Tokyo
  • fYear
    2006
  • fDate
    4-7 Dec. 2006
  • Firstpage
    760
  • Lastpage
    763
  • Abstract
    This paper presents an encoder core architecture for context-based adaptive binary arithmetic coding (CABAC) in H.264/AVC main profile. The throughput of CABAC encoder is usually limited due to i) bit-wise processing, ii) complicated data dependency, and iii) variant iteration times for each binary symbol. This paper adopts dynamic pipeline scheme to improve the performance of CABAC encoder. The characteristics of CABAC algorithm are utilized to reduce pipeline latency. Meanwhile, pipeline bypass scheme is applied to eliminate the possible memory conflict. Proposed encoder core is implemented under ROHM 0.35mum technology. Results show that the equivalent gate counts is 4.57k when the maximum frequency is 150MHz. It is estimated that the proposed CABAC encoding core can process the input binary symbol at a bit-rate of 80Mb/s
  • Keywords
    adaptive codes; arithmetic codes; binary codes; video codecs; video coding; 0.35 micron; 150 MHz; 80 Mbits/s; AVC; CABAC; H.264; bit-wise processing; context-based adaptive binary arithmetic coding; encoder core; pipeline latency reduction; Arithmetic; Automatic voltage control; Codecs; Context modeling; Data analysis; Delay; Encoding; Frequency estimation; Pipelines; Throughput; CABAC; H.264; architecture; pipeline;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
  • Conference_Location
    Singapore
  • Print_ISBN
    1-4244-0387-1
  • Type

    conf

  • DOI
    10.1109/APCCAS.2006.342119
  • Filename
    4145504