DocumentCode
2244075
Title
High Level Synthesis with Multiple supply Voltages for Energy and Combined Peak Power Minimization
Author
Zhao, Zhen ; Bian, Jinian ; Liu, Zhipeng ; Wang, Yunfeng ; Zhao, Kang
Author_Institution
Sch. of Math. Sci., Peking Univ.
fYear
2006
fDate
4-7 Dec. 2006
Firstpage
864
Lastpage
867
Abstract
Low-power design is one of the dominant considerations for certain circuits, and energy consumption as well as power distribution is two important measurements. The paper proposes ILP-based high-level synthesis with multi-cycling and multiple supply voltages scheme, which focuses on energy reduction and combined peak power minimization. Experimental results show that the scheme can efficiently reduce the total energy, and obtain an improved power distribution in both temporal and spatial directions by cycle peak power and module peak power simultaneously optimizing
Keywords
high level synthesis; low-power electronics; combined peak power minimization; energy consumption; high level synthesis; low-power design; multiple supply voltages; power distribution; Circuits; Dynamic scheduling; Energy consumption; High level synthesis; Iterative algorithms; Minimization; Power distribution; Scheduling algorithm; Switches; Voltage; ILP; high level synthesis; low power; mulptiple supply voltages; power distribution;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
Conference_Location
Singapore
Print_ISBN
1-4244-0387-1
Type
conf
DOI
10.1109/APCCAS.2006.342178
Filename
4145530
Link To Document