Title :
Fully-multiplexed First-order 3D IIR Frequency-Planar Filter Module
Author :
Madanayake, H. L P Arjuna ; Bruton, Len T.
Author_Institution :
Dept. Electr. & Comput. Eng., Calgary Univ., Alta.
Abstract :
A VLSI hardware architecture for the on-chip implementation of a first-order 3D IIR fully-multiplexed frequency-planar filter module (FMFPM) is proposed. FMFPMs may be employed in 3D IIR video filtering and sensor-array based plane-wave filtering applications. The proposed FMFPM can potentially be used as a 3D IIR building block circuit for the realization of second (or higher) order frequency-planar filters, 3D IIR beam filters, multiple passband beam filters and multiple passband frequency-planar filters which are required for realizing 3D IIR cone filter banks. An M = 4 passband frequency-planar filter example is provided using a single Xilinx Virtex-II xc2v2000fg676-4 FPGA device
Keywords :
IIR filters; VLSI; field programmable gate arrays; system-on-chip; video signal processing; 33D IIR; FMFPM; FPGA device; VLSI; building block circuit; fully multiplexed frequency planar filter module; hardware architecture; on chip implementation; plane wave filtering; sensor array; video filtering; Application software; Digital filters; Field programmable gate arrays; Filter bank; Filtering; Frequency; Hardware; IIR filters; Passband; Very large scale integration; 3D; Digital; FPGA; Filter; Frequency-planar; IIR;
Conference_Titel :
Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
Conference_Location :
Singapore
Print_ISBN :
1-4244-0387-1
DOI :
10.1109/APCCAS.2006.342383
