DocumentCode :
2246624
Title :
Low Power Pre-Comparison Scheme for NOR-Type 10T Content Addressable Memory
Author :
Huang, Po-Tsang ; Chang, Wei-Keng ; Hwang, Wei
Author_Institution :
Dept. of Electron. Eng. & Inst. of Electron., Nat. Chiao-Tung Univ., HsinChu
fYear :
2006
fDate :
4-7 Dec. 2006
Firstpage :
1301
Lastpage :
1304
Abstract :
A pre-comparison scheme is designed by using the NOR-type 10T content addressable memory (CAM) between the match line circuits and the pre-charging circuits. Thereby, several bits are pre-compared in advance through the pre-comparison circuit. With the pre-comparison scheme, it has reduce the discharging time and power consumption when the match line is mismatch. The size of the CAM array is about 32 words, and each word has 32bits. The proposed pre-comparison NOR-type 10T CAM can achieve 22.8% power reduction for the 4bits pre-comparison circuit. All the simulation results are based on TSMC 0.13mum CMOS technology and the clock frequency is 500MHz
Keywords :
CMOS integrated circuits; NOR circuits; content-addressable storage; 0.13 micron; 32 bit; 4 bit; 500 MHz; CAM array; CMOS technology; NOR-type 10T content addressable memory; low power pre-comparison scheme; match line circuits; precharging circuits; Associative memory; Asynchronous transfer mode; CADCAM; CMOS technology; Circuit simulation; Computer aided manufacturing; Design engineering; Energy consumption; MOS devices; Power dissipation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
Conference_Location :
Singapore
Print_ISBN :
1-4244-0387-1
Type :
conf
DOI :
10.1109/APCCAS.2006.342422
Filename :
4145639
Link To Document :
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