DocumentCode :
2246770
Title :
Design of AND and NAND Logic Gate Using NDR-BASED Circuit Suitable for CMOS Process
Author :
Liang, Dong-Shong ; Tai, Cheng-Chi ; Gan, Kwang-Jow ; Tsai, Cher-Shiung ; Chen, Yaw-Hwang
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan
fYear :
2006
fDate :
4-7 Dec. 2006
Firstpage :
1325
Lastpage :
1328
Abstract :
AND and NAND logic gate based on the negative differential resistance (NDR) device is demonstrated. This NDR device is made of metal-oxide-semiconductor field-effect-transistor (MOS) devices that could exhibit the NDR characteristic in the current-voltage curve by suitably arranging the MOS parameters. The devices and circuits are implemented by the standard 0.35mum CMOS process
Keywords :
CMOS logic circuits; logic design; logic gates; 0.35 micron; AND logic gate; CMOS process; MOS parameters; NAND logic gate; NDR-based circuit; logic design; metal-oxide-semiconductor field-effect-transistor; negative differential resistance device; CMOS logic circuits; CMOS process; Circuit simulation; Logic circuits; Logic design; Logic devices; Logic gates; MOS devices; Switches; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
Conference_Location :
Singapore
Print_ISBN :
1-4244-0387-1
Type :
conf
DOI :
10.1109/APCCAS.2006.342428
Filename :
4145645
Link To Document :
بازگشت