DocumentCode
2247251
Title
Static buffered SET based logic gates
Author
Lageweg, Casper ; Cotofana, Sorin ; Vassiliadis, Stamatis
Author_Institution
Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
fYear
2002
fDate
2002
Firstpage
491
Lastpage
494
Abstract
In this paper we investigate single electron tunneling (SET) devices from the logic design perspective, using the SET tunnel junction´s ability to control the transport of individual electrons. In SET technology, small circuits containing only 1 tunnel junction (passive circuits) can form compact circuits implementing complex functions, but suffer from strong feedback effects. To alleviate this problem a dynamic buffer was proposed. However, this dynamic buffer has a behavior similar to a flip-flop and requires additional control signals. Therefore we first propose in this paper a static SET active buffer. The proposed static buffer switches output values by transporting one electron only and operates on a DC supply voltage. Second, we combine the proposed buffer with a threshold gate and derive static buffered NAND and NOR gates. We demonstrate our approach by presenting simulation results for a small network of gates, proving that the gates function correctly under a fanout of 4.
Keywords
circuit simulation; digital simulation; integrated circuit modelling; logic design; logic gates; nanoelectronics; single electron devices; DC supply voltage; NAND gate; NOR gate; SET devices; gate network; logic design; simulation; single electron tunneling; static SET active buffer; static buffered SET-based logic gates; threshold gate; Electrons; Feedback circuits; Flip-flops; Logic design; Logic devices; Logic gates; Passive circuits; Switches; Tunneling; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanotechnology, 2002. IEEE-NANO 2002. Proceedings of the 2002 2nd IEEE Conference on
Print_ISBN
0-7803-7538-6
Type
conf
DOI
10.1109/NANO.2002.1032295
Filename
1032295
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