DocumentCode
2247820
Title
A Colliding Puck Simulator for Computational RAM
Author
Cheung, Dickson T S ; Elliott, Duncan G. ; Loucks, Wayne M.
Author_Institution
Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
Volume
1
fYear
1998
fDate
24-28 May 1998
Firstpage
101
Abstract
A Colliding Puck Simulator (CPS) was written for Computational RAM (C·RAM), a massively parallel processor-in-memory SIMD architecture. Comparing simulated C·RAM execution time with measured workstation execution time, significant speed up is obtained when using up to 800 processor elements
Keywords
digital simulation; parallel architectures; physics computing; random-access storage; C·RAM; CPS; Colliding Puck Simulator; Computational RAM; massively parallel processor-in-memory SIMD architecture; measured workstation execution time; processor elements; Circuit simulation; Computational modeling; Computer aided instruction; Computer architecture; Computer simulation; Concurrent computing; Random access memory; Read-write memory; Time measurement; Velocity measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 1998. IEEE Canadian Conference on
Conference_Location
Waterloo, Ont.
ISSN
0840-7789
Print_ISBN
0-7803-4314-X
Type
conf
DOI
10.1109/CCECE.1998.682561
Filename
682561
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