Frequency Synthesizer for Wireless Applications using TDTL

A frequency synthesizer using a first-order time delay tanlock loop (TDTL) is proposed in this work. The synthesizer involves introducing an integer divider within the structure of the TDTL in order to produce multiple frequencies from one reference source, which in the case of the TDTL is the digital controlled oscillator (DCO). An adaptive mechanism was embedded into the loop to compensate for the errors and changes the divider cause when it is introduced within the loop for different division factors