DocumentCode :
2248543
Title :
Variational Circuit Simulator based on a Unified Methodology using Arithmetic over Taylor Polynomials
Author :
Zhou, Qiang ; Zou, Yi ; Cai, Yici ; Hong, Xianlong
Author_Institution :
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing
fYear :
2006
fDate :
4-7 Dec. 2006
Firstpage :
1635
Lastpage :
1638
Abstract :
This paper proposed a unified methodology for variational analysis or simulation based on Taylor polynomials. In this methodology, multiple variational metrics under different variational modeling could be concurrently estimated. Applications could include all aspects of variational or statistical analysis and simulation. Experimental results on interconnect delay analysis and circuit simulation validate the proposed methodology
Keywords :
circuit simulation; delays; interconnections; polynomials; statistical analysis; variational techniques; Taylor polynomials; interconnect delay analysis; statistical analysis; unified methodology; variational circuit simulator; variational modeling; Analytical models; Circuit analysis; Circuit simulation; Computational modeling; Computer science; Computer simulation; Digital arithmetic; Polynomials; Stochastic processes; Taylor series; Taylor; arithmetic; simulation; variational;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
Conference_Location :
Singapore
Print_ISBN :
1-4244-0387-1
Type :
conf
DOI :
10.1109/APCCAS.2006.342078
Filename :
4145722
Link To Document :
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