A low-complexity high-speed QR decomposition implementation for MIMO receivers

QR decomposition (QRD) is an essential signal processing task for many MIMO signal detection schemes. However, decomposition of complex MIMO channel matrices with large dimensions leads to high computational complexity, and hence results in either large core area or low throughput. Moreover, for mobile communication applications that involve fast-varying channels, it is required to perform QR decomposition with low processing latency. In this paper, we propose a hybrid QRD scheme that uses a combination of multi-dimensional Givens rotations, Householder transformations and the conventional two-dimensional (2D) Givens rotations to both reduce the overall computational complexity and achieve higher execution parallelism. To prove the effectiveness of the proposed QRD scheme, a novel pipelined architecture is presented that uses un-rolled pipelined CORDIC processors iteratively to maximize throughput and resource utilization, while minimizing the gate count. The architectures of the main data processing modules, namely the 2D, Householder 3D and 4D/2D configurable pipelined CORDIC processors, are also presented. Synthesis results for a 4times4 MIMO detector in 0.13 mum CMOS process indicate that this QRD design computes a 4times4 complex R matrix and four updated 4times1 complex symbol vectors every 40 cycles, at a clock frequency of 270 MHz and requires 36 K gates. The proposed design achieves the lowest processing time and the highest throughput reported to-date for the same framework.