Reconfigurable Logic Element using a Chaotic Circuit

Author

Murali, K. ; Sinha, Sudeshna ; Ditto, William L.

Author_Institution

Dept. of Phys., Anna Univ., Chennai

fYear

2006

fDate

4-7 Dec. 2006

Firstpage

1839

Lastpage

1842

Abstract

We report the experimental realization of all the fundamental logic gates, flexibly, using a chaotic circuit. In our scheme a simple threshold mechanism allows the chaotic circuit unit to switch easily between behaviours emulating the different gates. We also demonstrate the ability of on-the-fly dynamic reconfiguration of this logic cell

Keywords

chaos; logic arrays; logic gates; chaotic circuit; logic cell; logic gates; on-the-fly dynamic reconfiguration; reconfigurable logic element; Biomedical engineering; Chaos; Circuits; Computer architecture; Control systems; Logic arrays; Logic gates; Physics computing; Reconfigurable logic; Switches;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on

Conference_Location

Singapore

Print_ISBN

1-4244-0387-1

Type

conf

DOI

10.1109/APCCAS.2006.342196

Filename

4145772

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2249554