Application of Multi-ported CAM for Parallel Coding

This paper presents a parallel coding architecture using a flexible multi-ported content addressable memory (CAM). A previously reported flexible multi-port content addressable memory (FMCAM) technology (Kumaki et al., 2004) is improved by additional schemes for a single search mode and counting value setting and enables the fast parallel coding operation. Evaluation results for Huffman encoding within the JPEG application show that the proposed architecture can reduce the required clock-cycle number by 93% is comparison to a conventional DSP. Furthermore, the performance per unit area, measured in MOPS/mm², can be improved by a factor 3.8 in comparison to a conventional DSP