Ballistic deflection transistors and the emerging nanoscale era

Author

Wolpert, David ; Irie, Hiroshi ; Sobolewski, Roman ; Ampadu, Paul ; Diduck, Quentin ; Margala, Martin

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Rochester, Rochester, NY, USA

fYear

2009

fDate

24-27 May 2009

Firstpage

61

Lastpage

64

Abstract

This paper presents a brief survey of the state of the art in nanoscale electronics, with special emphasis on room-temperature nanoscale ballistic deflection transistors (BDTs) and T-branch junctions (TBJs). Both devices are planar structures etched into a two-dimensional electron gas (2DEG). Extremely low capacitances (~0.2 fF) in the 2DEG system and low switching voltages (~0.15 V) predict THz performance and ultra-low power consumption, making BDTs and TBJs among the most promising and versatile of ballistic nanoelectronic devices. Obstacles in circuit and logic design using the BDT are presented along with potential solutions. I-V characteristics from a fabricated BDT and simulation results from a two-input BDT NAND gate are provided. Future plans to facilitate large-scale integration are discussed.

Keywords

ballistic transport; high electron mobility transistors; logic gates; nanoelectronics; NAND gate; T-branch junctions; ballistic deflection transistors; nanoscale electronics; nanoscale era; room-temperature nanoscale ballistic deflection transistors; two-dimensional electron gas; Capacitance; Circuit simulation; Electrons; Energy consumption; Etching; Large scale integration; Logic design; Low voltage; Nanoscale devices; Transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on

Conference_Location

Taipei

Print_ISBN

978-1-4244-3827-3

Electronic_ISBN

978-1-4244-3828-0

Type

conf

DOI

10.1109/ISCAS.2009.5117685

Filename

5117685