DocumentCode
2249750
Title
Efficient Algorithms for Hardware/Software Partitioning to Minimize Hardware Area
Author
Jigang, Wu ; Srikanthan, Thambipillai
Author_Institution
Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore
fYear
2006
fDate
4-7 Dec. 2006
Firstpage
1875
Lastpage
1878
Abstract
Area efficiency is one of the major considerations in constraint aware hardware/software partitioning process. This paper models hardware/software partitioning as an optimization problem with the objective of minimizing area utilization under the constraints of execution time and power consumption. An efficient heuristic algorithm running in O(n log n) is proposed by extending the method solving the 0-1 knapsack problem. Also, an exact algorithm based on dynamic programming is proposed to produce the optimal solution for small-sized problems. Computational results show that the proposed heuristic algorithm yields very good approximate solutions while dramatically reduces the execution time
Keywords
computational complexity; dynamic programming; hardware-software codesign; heuristic programming; minimisation; area efficiency; area utilization minimization; dynamic programming; exact algorithm; hardware-software partitioning; heuristic algorithm; knapsack problem; optimization problem; small-sized problems; Dynamic programming; Embedded software; Embedded system; Energy consumption; Hardware; Heuristic algorithms; Partitioning algorithms; Software algorithms; Software performance; Time factors; algorithm; co-design; complexity; dynamic programming; hardware/software partitioning;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
Conference_Location
Singapore
Print_ISBN
1-4244-0387-1
Type
conf
DOI
10.1109/APCCAS.2006.342205
Filename
4145781
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