Title :
A segmental bus-invert coding method for instruction memory data bus power efficiency
Author :
Gu, Ji ; Guo, Hui
Author_Institution :
Sch. of Comput. Sci. & Eng., Univ. of New South Wales, Sydney, NSW, Australia
Abstract :
This paper presents a bus coding methodology for instruction memory data-bus switching reduction. Compared to the existing state of the art multi-way partial bus-invert coding (MPBI) which relies on data bit-correlation, our approach is very effective in reducing switching activity for bus data, since little correlation can be observed on instruction data buses. Our experiments demonstrate the proposed encoding can reduce up to 42% of switching activity, with an average of 30% reduction, while MPBI achieves just 17.6% reduction in switching activity.
Keywords :
encoding; instruction sets; low-power electronics; microprocessor chips; data bit-correlation; instruction memory data bus power efficiency; lower power processor-based system; multiway partial bus-invert coding; segmental bus-invert coding method; switching reduction; Australia; CMOS technology; Computer science; Data buses; Data engineering; Encoding; Energy consumption; Microprocessors; Power engineering and energy; Power system reliability;
Conference_Titel :
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-3827-3
Electronic_ISBN :
978-1-4244-3828-0
DOI :
10.1109/ISCAS.2009.5117704
