Title :
Ultra fine multi-line patterning based on sidewall patterning technique
Author :
Kyung-Hoon Chung ; Suk-Kang Sung ; Jong Duk Lee ; Byung-Gook Park
Author_Institution :
Inter-Univ. Semicond. Res. Center, Seoul Nat. Univ., South Korea
fDate :
Oct. 31 2001-Nov. 2 2001
Abstract :
A patterning technique to define nanoscale multiple lines is developed and optimized using sidewall structure. In this experiment, sidewall multi-line patterning technique makes it possible to realize about 50nm poly-Si lines which have 70nm as the narrowest space. This technique is a proximity effect free fabrication process, so it is expected that the sidewall multi-line patterning technique can be applied to fabricate single electron devices, quantum devices, and other nanoscale devices.
Keywords :
nanotechnology; 50 nm; 70 nm; Si; fabrication process; nanoscale device; nanoscale multiple lines; polysilicon lines; quantum device; sidewall patterning technique; single electron device; ultra-fine multi-line patterning; Buffer layers; Dry etching; Fabrication; Lighting; Lithography; Nanoscale devices; Optical buffering; Proximity effect; Semiconductor materials; Single electron devices;
Conference_Titel :
Microprocesses and Nanotechnology Conference, 2001 International
Conference_Location :
Shimane, Japan
Print_ISBN :
4-89114-017-8
DOI :
10.1109/IMNC.2001.984152
