Title :
Simultaneous Analysis of Capacitive Coupling and Leakage Noise in Nanometer Scale Circuits
Author :
Tan, Chuen M. ; Chowdhury, Masud H.
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Univ., Chicago, IL
Abstract :
Traditional analysis deals with one noise source at a time. However, in nanometer scale circuits the evolving reality of multiple noise sources interacting with each other must be considered, since signal at an evaluation node will reflect the cumulative effect of all the active noise sources. This gives rise to a new approach - compound noise analysis. In this paper, an analysis of the combined effects of coupled and leakage noise is proposed. The proposed technique does not rely on simulation tools, and provides an insight to the behavior of individual noise sources when combined together on an evaluation node. It utilizes the recent BSIM4 models and addresses the issues of nanometer circuits with respect to parasitic capacitance, subthreshold and gate leakage noise in thin gate oxides below 15Aring. The model analyzes the noise effects dynamically with time, thus providing effective evaluation of signal integrity in high speed switching circuitry. Here coupling from multiple simultaneously switching aggressors, and leakage from more than one sources are modeled
Keywords :
integrated circuit modelling; integrated circuit noise; nanoelectronics; BSIM4 models; capacitive coupling; compound noise analysis; leakage noise; nanometer scale circuits; subthreshold leakage; Active noise reduction; Circuit noise; Circuit simulation; Coupling circuits; Gate leakage; Logic circuits; Parasitic capacitance; Signal analysis; Subthreshold current; Voltage; BSIM4; compound noise; gate leakage; nanometer; subtrheshold leakage;
Conference_Titel :
Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
Conference_Location :
Singapore
Print_ISBN :
1-4244-0387-1
DOI :
10.1109/APCCAS.2006.342281